SIC Electronics offers STM8L151C8T6TR STMicroelectronics

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STM8L**1C8T6TR Introduction

This document describes the features, pinout, mechanical data and ordering information for:devices.

• High-density STM8L*5xxx devices: STM8L**1x8 and STM8L**2x8 microcontrollerswith a Flash memory density of *4 Kbyte.

• Medium+ density STM8L*5xxx devices: STM8L**1R6 and STM8L**2R6microcontrollers with Flash memory density of *2 Kbyte.

For further details on the STMicroelectronics ultra-low-power family please refer toSection 2.3: Ultra-low-power continuum on page *3.For detailed information on device operation and registers, refer to the reference manual(RM***1).

For information on to the Flash program memory and data EEPROM, refer to theprogramming manual (PM***4).

For information on the debug module and SWIM (single wire interface module), refer to theSTM8 SWIM communication protocol and debug module user manual (UM***0).

For information on the STM8 core, refer to the STM8 CPU programming manual (PM***4).2
Description

The high-density and medium+ density STM8L*5xx6/8 ultra-low-power devices feature anenhanced STM8 CPU core providing increased processing power (up to *6 MIPS at*6 MHz) while maintaining the advantages of a CISC architecture with improved codedensity, a **-bit linear addressing space and an optimized architecture for low-poweroperations.

The family includes an integrated debug module with a hardware interface (SWIM) whichallows non-intrusive in-application debugging and ultrafast Flash programming.All high-density and medium+ density STM8L*5xx6/8 microcontrollers feature embeddeddata EEPROM and low-power low-voltage single-supply program Flash memory.The devices incorporate an extensive range of enhanced I/Os and peripherals, a **-bitADC, two DACs, two comparators, a real-time clock, four **-bit timers, one *-bit timer, aswell as standard communication interfaces such as two SPIs, an I2C interface, and threeUSARTs. A 8x*0 or 4x**-segment LCD is available on the STM8L**2x8 devices.

Themodular design of the peripheral set allows the same peripherals to be found in different STmicrocontroller families including **-bit families. This makes any transition to a differentfamily very easy, and simplified even more by the use of a common set of developmenttools.DS***8 Rev *1 *1/**7STM8L**1x6/8 STM8L**2x6/8 Description**2.1

 

STM8L ultra-low-power *-bit family benefits

High-density and medium+ density STM8L*5xx6/8 devices are part of the STM8L ultra-lowpower family providing the following benefits:

• Integrated system

Up to *4 Kbyte of high-density embedded Flash program memory

Up to 2 Kbyte of data EEPROM

Up to 4 Kbyte of RAM

Internal high-speed and low-power low speed RC.

Embedded reset

• ultra-low-power consumption

1 µA in Active-halt mode

Clock gated system and optimized power management

Capability to execute from RAM for Low-power wait mode and Low-power runmode

• Advanced features

Up to *6 MIPS at *6 MHz CPU clock frequency

Direct memory access (DMA) for memory-to-memory or peripheral-to-memoryaccess.

• Short development cycles

Application scalability across a common family product architecture withcompatible pinout, memory map and modular peripherals.

Wide choice of development tools

STM8L ultra-low-power microcontrollers can operate either from 1.8 to 3.6 V (down to1.*5 V at power-down) or from 1.*5 to 3.6 V. They are available in the **0 to **5 °C and **0to ***5°C temperature ranges.

These features make the STM8L ultra-low-power microcontroller families suitable for a widerange of applications:

• Medical and handheld equipment

• Application control and user interface

• PC peripherals, gaming, GPS and sport equipment

• Alarm systems, wired and wireless sensors

• Metering

The devices are offered in five different packages from *2 to *0 pins. Different sets ofperipherals are included depending on the device. Refer to Section 3 for an overview of thecomplete range of peripherals proposed in this family.

All STM8L ultra-low-power products are based on the same architecture with the samememory mapping and a coherent pinout.

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